Nanoelectonics for next-generation intergrated circuits / edited by Rohit Dhiman
Material type:
TextPublication details: London : CRC Press, c2023. Description: xix, 278 p. : ill. ; 24 cmISBN: 9780367726560 ; 9780367725622 ; 9781003155751 DDC classification: 621.3815 NAN
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Villa College Library | Villa College Library | 621.3815 NAN (Browse shelf(Opens below)) | Available | 18167 | ||
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English Lending
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Villa College Library | Villa College Library | 621.3815 NAN (Browse shelf(Opens below)) | Available | 18168 |
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| 621.3815 BOY Electronic devices and circuit theory / | 621.3815 FLO Electronic devices : conventional current version / | 621.3815 NAN Nanoelectonics for next-generation intergrated circuits / | 621.3815 NAN Nanoelectonics for next-generation intergrated circuits / | 621.381535 GEO Operational amplifiers / | 621.381535 GEO Operational amplifiers / | 621.381952 MAN Computer system architecture / |
CONTENT INCLUDES:
Chapter 1: Emerging graphene-based electronics: properties to potentials
Chapter 2: Models for modern spintronics memories with layered magnetic interfaces
Chapter 3: Evaluation of magnetic anisotropy via instrinsic spin infusion
Chapter 4: Quantrum-dot cellular automata (QCA) nanotechnology for next-generation systems
Chapter 5: An overview of nanowire field-effect transistors for future nanoscale intergrated circuits
Chapter 6: Investigation of tunnel field-effect transistors (TFETs) for label-free biosensing
Chapter 7: Analog and linearity analysis of vertical nanowire TFET
Chapter 8: Effects of variation in gate material on enhancement mode P-GaN AlGaN/GaN HEMTs
Chapter 9: Electrical modeling of one selector-one resistor (1S-1R) for mitigating the sneak-path current in a nano-crossbar array
Chapter 10: SRAM: An essential part of intergrated circuits
Chapter 11: Implementation of 512-bit SRAM tile using the lector technique for leakage power reduction
Chapter 12: Characterization of stochastic process variability effects on nano-scale analog circuits
Chapter 13: Versatile single input single output filter topology suitable for intergrated circuits
Chapter 14: Secured intergrated circuit (IC/IP) design flow
Includes bibliographical references and index.
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